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| PD - 9.1378A PRELIMINARY Logic-Level Gate Drive Advanced Process Technology l Isolated Package l High Voltage Isolation = 2.5KVRMS l Sink to Lead Creepage Dist. = 4.8mm l Fully Avalanche Rated Description l l IRLI2203N HEXFET(R) Power MOSFET D VDSS = 30V RDS(on) = 0.007 G ID = 61A S Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The TO-220 Fullpak eliminates the need for additional insulating hardware in commercial-industrial applications. The moulding compound used provides a high isolation capability and a low thermal resistance between the tab and external heatsink. This isolation is equivalent to using a 100 micron mica barrier with standard TO-220 product. The Fullpak is mounted to a heatsink using a single clip or by a single screw fixing. TO-220 FULLPAK Absolute Maximum Ratings Parameter ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 srew Max. 61 43 400 47 0.31 16 390 60 4.7 1.2 -55 to + 175 300 (1.6mm from case ) 10 lbf*in (1.1N*m) Units A W W/C V mJ A mJ V/ns C Thermal Resistance Parameter RJC RJA Junction-to-Case Junction-to-Ambient Typ. --- --- Max. 3.2 65 Units C/W 11/1/96 IRLI2203N Electrical Characteristics @ TJ = 25C (unless otherwise specified) V(BR)DSS V(BR)DSS/TJ Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Drain to Sink Capacitance Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss C Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 0.007 VGS = 10V, ID = 37A 0.01 VGS = 4.5V, ID = 31A --- V VDS = VGS, ID = 250A --- S VDS = 25V, I D = 60A 25 VDS = 30V, VGS = 0V A 250 VDS = 24V, VGS = 0V, T J = 150C 100 VGS = 16V nA -100 VGS = -16V 110 ID = 60A 31 nC VDS = 24V 57 VGS = 4.5V, See Fig. 6 and 13 --- VDD = 15V --- ID = 60A ns --- RG = 1.8, VGS = 4.5V --- RD = 0.25, See Fig. 10 D Between lead, --- 4.5 --- 6mm (0.25in.) nH G from package --- 7.5 --- and center of die contact S --- 3500 --- VGS = 0V --- 1400 --- VDS = 25V pF --- 690 --- = 1.0MHz, See Fig. 5 --- 12 --- = 1.0MHz Min. Typ. Max. Units Conditions D MOSFET symbol --- --- 61 showing the A G integral reverse --- --- 400 p-n junction diode. S --- --- 1.3 V TJ = 25C, IS = 37A, VGS = 0V --- 94 140 ns TJ = 25C, IF = 60A --- 280 410 C di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Min. 30 --- --- --- 1.0 47 --- --- --- --- --- --- --- --- --- --- --- Typ. --- 0.035 --- --- --- --- --- --- --- --- --- --- --- 15 210 29 54 Source-Drain Ratings and Characteristics IS ISM VSD t rr Q rr t on Specification changes Rev. # 1 1 Notes: Parameters VGS(th) (Max.) VGS (Max.) Old spec. 2.5V 20 New spec. No spec. 16 Comments Removed VGS(th) Max. Specification Decrease VGS Max. Specification Revision Date 11/1/96 11/1/96 Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) VDD = 15V, starting TJ = 25C, L = 220H RG = 25, IAS = 60A. (See Figure 12) I SD 60A, di/dt 140A/s, VDD V(BR)DSS , Pulse width 300s; duty cycle 2%. t=60s, =60Hz Uses IRL2203N data and test conditions TJ 175C IRLI2203N 1000 VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTT OM 2.5V TOP 1000 ID , D ra in -to -S o u rc e C u rre n t (A ) 100 ID , D ra in -to -S o u rc e C u rre n t (A ) VGS 15V 12V 10V 8.0V 6.0V 4.0V 3.0V BOTT OM 2.5V TOP 100 10 10 2.5 V 2 .5V 20 s PU LSE W ID TH T J = 2 5C 0.1 1 10 1 A 1 0.1 1 20 s PU LSE W ID TH T J = 1 75C 10 100 A 100 V D S , Drain-to-Source V oltage (V ) V D S , Drain-to-Source V oltage (V ) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1000 2.0 T J = 2 5 C 100 R DS (on ) , Drain-to-S ource O n Resistance ( Norm alized) I D = 100 A I D , D rain -to- S ou rce C ur ren t (A ) 1.5 T J = 1 75 C 1.0 10 0.5 1 2.0 3.0 4.0 5.0 V DS = 1 5 V 2 0 s P U L SE W ID TH 6.0 7.0 8.0 9.0 A 0.0 -60 -40 -20 0 20 40 60 80 V G S = 10V A 100 120 140 160 180 V G S , Ga te-to-S o urce V oltage (V ) T J , Junction Tem perature (C ) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature IRLI2203N 8000 C , C a p a cita n ce (p F ) 6000 C is s C os s V G S , G ate-to-Source V oltage ( V) V GS C is s C rs s C o ss = 0 V, f = 1M H z = C gs + C gd , Cds SH O RTE D = C gd = C ds + C g d 15 I D = 60A V D S = 24 V V D S = 15 V 12 9 4000 6 C rs s 2000 3 0 1 10 100 A 0 0 30 60 FOR TE ST CIR C UIT SEE FIGU RE 1 3 A 90 120 150 V D S , Drain-to-Source V oltage (V) Q G , T otal G ate Charge (nC) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 1000 1000 I S D , R e v e rse D ra in C u rre n t (A ) O PER ATIO N IN TH IS AR EA L IM ITED BY R DS (o n) 10 s TJ = 25 C TJ = 17 5C 100 I D , D ra in C u rre n t (A ) 100 10 0s 1m s 10 10m s 10 0.5 1.0 1.5 2.0 2.5 VG S = 0 V 3.0 A 1 1 T C = 25 C T J = 17 5C S ing le Pulse 10 100 3.5 A V S D , S ource-to-Drain Voltage (V ) V D S , Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area IRLI2203N 70 VDS 60 RD VGS RG ID , D ra in C u rre n t (A m p s ) D.U.T. + 50 - VDD 40 5.0V Pulse Width 1 s Duty Factor 0.1 % 30 20 Fig 10a. Switching Time Test Circuit VDS 90% A 25 50 75 100 125 150 175 10 0 TC , C ase T em perature (C ) Fig 9. Maximum Drain Current Vs. Case Temperature 10% VGS td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms 10 T herm al R es ponse (Z th J C ) D = 0 .5 0 1 0 .2 0 0 .1 0 0 .0 5 0.1 0 .0 2 0 . 01 No te s: 1 . Du ty fa ctor D = t PDM t 1 t 2 S IN G L E P U L S E (T H E R M A L R E S P O N S E ) 0.01 0.00001 1 /t 2 2. P eak TJ = P D M x Z thJ C + T C A 100 0.0001 0.001 0.01 0.1 1 10 t 1 , R ectangular P ulse D uratio n (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case IRLI2203N 1000 E A S , S in g le P u lse A va la n c h e E n e rg y (m J ) TO P 800 15 V BO TTOM ID 2 4A 42A 60 A VDS L D R IV E R 600 RG 2 0V tp D .U .T IA S 0 .0 1 + - VDD A 400 Fig 12a. Unclamped Inductive Test Circuit 200 0 V D D = 1 5V 25 50 75 100 125 150 A 175 V (BR )D SS tp Starting TJ , Junction T emperature (C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current I AS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50K QG 12V .2F .3F 4.5 V QGS VG QGD VGS 3mA D.U.T. + V - DS Charge IG ID Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit IRLI2203N Peak Diode Recovery dv/dt Test Circuit D.U.T + + Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer - + RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test + VDD Driver Gate Drive P.W. Period D= P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt VDD Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS IRLI2203N Package Outline TO-220 Fullpak Outline Dimensions are shown in millimeters (inches) 10.60 (.417 ) 10.40 (.409 ) o 3 .40 (.1 33) 3 .10 (.1 23) -A3.7 0 (.145) 3.2 0 (.126) 4.80 (.189 ) 4.60 (.181 ) 2.80 (.110) 2.60 (.102) L EA D AS SIGN M EN T S 1 - GA T E 2 - D R AIN 3 - SO U R C E 7.10 (.280 ) 6.70 (.263 ) 16 .0 0 (.630) 15 .8 0 (.622) 1.15 (.045) M IN . 1 2 3 NO T ES : 1 D IM E N SION IN G & T O LER AN C IN G PE R A N SI Y1 4.5M , 1982 2 C O N T R OLL IN G D IM EN SION : IN C H . 3.30 (.130) 3.10 (.122) -B13 .7 0 (.540) 13 .5 0 (.530) C D A 1.40 (.05 5) 3X 1.05 (.04 2) 2 .5 4 (.100) 2X 0.90 (.035 ) 3X 0.70 (.028 ) 0.25 (.010) M AM B 3X 0.48 (.019 ) 0.44 (.017 ) B 2.85 (.1 12) 2.65 (.1 04) M IN IM U M C R E EP AG E D IST A N C E B ET W E EN A -B -C -D = 4.80 (.189 ) Part Marking Information TO-220 Fullpak E PLE : T : T IS IS N 1010 E X AMXAM PLE HI S HIS A N AIRF IRF I840G W ITW ITH S E MB LY H A S AS SE MBLY LO TLOT DE 9B 1M CO CODE E401 A IN TE R NA T ION A L INT ER NAT IONA L R EC T IF IER IR F 1010 RE CTIF IER IRF I840G LO GO 9246 LOGO E 9 24 9B 401 1M 5 P A RT NU M BE R A PA RT NU MBE R A S S EM MBLY AS SE B LY LO T CO DE E LOT COD D A TE C OD E D ATE CODE (Y YW W ) Y(YYW YE)A R Y=W YY = W AR W W = YE E EK W W = W E EK WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: K&H Bldg., 2F, 3-30-4 Nishi-Ikeburo 3-Chome, Toshima-Ki, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371 http://www.irf.com/ Data and specifications subject to change without notice. 11/96 |
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